SPACING BETWEEN PCB TRACES
FOR VARIOUS VOLTAGE LEVELS

CIRCUIT BOARD LAYOUT GUIDELINES

A proper clearance between PCB traces is critical to avoid flashover or tracking between electrical conductors. There is a variety of industry and safety standards that prescribe different spacing requirements depending on the voltage, application and other factors. Here you will find some considerations on determining the proper spaces between PCB tracks.

SAFETY REQUIREMENTS

When a product has to be recognized by a certain safety agency, there is a legal requirement to meet specific insulation requirements provided in the relevant agency's standard. In this case, finding the required spacing is more or less straightforward. For example, for mains-powered or battery-powered information technology equipment, the minimum allowed PCB spacing should be determined from UL 60950-1 Tables 2L or 2N, which specify so called "creepage" distances for various grades of insulation depending on working voltage, pollution degree, PCB material group and coating. The required grade of insulation depends on the location of the circuits. The standard specifies functional, basic, supplementary, double and reinforced insulations. For example, when a breakdown of insulation can create a hazardous voltage on user accessible conductive parts (such as in case of insulation between mains circuits and low-voltage secondary circuits), a double or reinforced insulation is required. In this case, to separate such circuits on the PCB you need to double the respective distances shown in the above tables.
If you don't have an access to UL 60950-1, a third party Creepage calculator will help you determine the required grade of insulation and find the necessary distance. However, consult with UL 60950-1 for final design decisions.

OPERATIONAL REQUIREMENTS

The distances provided in UL 60950-1 actually greatly exceed the spacing necessary for proper operation of circuits. This was done in order to provide increased protection against electric shock. For the circuits whose locations do not require electric shock protection, spacing between printed circuit tracks can be made smaller.

For the so called functional insulation, UL 60950-1 permits to use separation distances smaller than the specified Tables 2L and 2N, provided they withstand the electric strength test (casually called HiPot) per Par.5.2.2 Table 5B. In other words, where only functional insulation is required, you don't need to meet any specific clearance between PC traces for as long as there will be no electric breakdown between them at the prescribed test voltage. This test voltage varies depending on the working voltage and generally is several times greater then actual working voltage between separated traces. Unfortunately, there is no clear information in the literature on how to design a PCB to meet a specific withstanding voltage between the tracks. Experiments performed by UL in the course of analysis of silver PCB surface finish, demonstrated that the withstand voltage of a pair of parallel conductors is purely a function of conductor spacing, not surface finish. Based on the experiments, UL specified withstand voltage of 40 volts/mil or about 1.6 kW/mm in their test methods of UL796 Standard for Printed Wiring Boards. In my view it is reasonable therefore to use these numbers in designing the board to withstand a particular HiPot. For example, for working voltage 500V you need to meet the withstanding test voltage 1740 Vrms per UL 60950-1 Table 5B. Such AC voltage has 1740*√2=2461 V peak value. With the 40V/mils criterion, the required minimum spacing would be 2461/40=62 mils (or 1.6 mm).

For products that are not covered by UL60950-1 safety standard, to determine the clearances the designers normally consult with IPC-2221, which is widely accepted throughout the world as a generic PCB design standard for commercial and industrial applications. The Table 6.1 of IPC-2221 specifies minimum electrical conductor clearance as a function of voltage, elevation level and the coating. One would think that a general type standard has to be more liberal then UL requirements. In reality, above 150V level IPC actually calls for larger spacing between uncoated external conductors then those you can derive from UL 60950-1 Table 5B in conjunction with the 40V/mil HiPot criterion. Of course, it is always desirable to maximize whenever possible the distance between conductors on individual layers in order to minimize the possibility of electric breakdown and to reduce parasitic capacitance. However, because of usual shortage of space on a PCB, spreading out the traces and components more then it is really necessary may not be feasible. From a technical standpoint, IPC-2221 stepwise clearance limits are mostly baseless. For example, there is no reason whatsoever, why you need 2.5mm clearance for 301V, while for 300V you can use 1.25mm. A new IPC-9592 standard for power conversion circuits provides linear functional spacing requirements: SPACING (mm) = 0.6 + Vpeak x .005. However, in most cases this formula results in even higher spacings then IPC 2221. Note that all IPC doc's are voluntarily rather then mandatory. Particularly, IPC-2221 states that "Existence of such Standards and Publications shall not in any respect preclude any member or nonmember of IPC from manufacturing or selling products not conforming to such Standards and Publication".

Where shortage of space on a PCB is an issue, for non-UL applications you may need to use the spacing smaller then those that are prescribed IPC. However, be sure to use an ample safety factor to withstand the voltages substantially higher then the peak voltage between the traces under any abnormal and transient conditions. It is interesting to note that many major power supply manufacturers in their low-power designs are widely using 500-600V MOSFETs in TO220 package operating at 400V and higher. With this package you can have about 30 mils spacing between the pads while IPC would require at least 100 mils. Even if you spread the leads on the PCB, you can't do anything with 50-mil spacing between the TO220 leads along the surface of the package.

As a reference, the chart below compares PCB clearance limits based on the following three specs:

IPC2221 for external layers for uncoated bare board,

IPC9592

UL60950 for functional insulation, designed to meet HiPot test per Table 5B with the assumption of 40V/mil withstand voltage

Also see printed circuit board layout guidelines for power circuits.

FIND PCB PRODUCTS AND SERVICES BY SPEC

PCB trace spacing for voltage chart

CONCLUSION.
When the product is covered by a UL standard, you need to select the appropriate table in the UL standard. Particularly, for the products covered by UL60950-1, determine the grade of insulation depending on the location of the circuits and then find from Tables 2L or 2N minimum required spacing based on working voltage, pollution degree, PCB material group and the coating. For functional insulation UL permits usage of lesser distance if it withstands the test voltage per Table 5B. For practical purposes, in my view you can consider that the withstand test voltage is 40V/mil (1.6kV/mm). Of course, this test voltage is always much higher then actual operating voltage. Note that technically the insulation requirements given in UL 60950 are for frequencies up to 30 kHz So far UL 60950-1 2nd Edition permits to use the same requirements for frequencies above 30 kHz until they will figure out what to do about it. You can't rule out that in the future UL would adopt tougher standards for high frequency circuits based on IEC 60664-1 and IEC 60664-4, which would affect most SMPS.

If there is no legal requirement to meet UL or any other product control law, use IPC-2221 (or IPC-9592 for power circuits) clearance recommendations whenever possible. However, where shortage of space on a PCB is an issue, you may need to use a smaller spacing, provided it still withstands voltages substantially higher then the peak voltage between the traces.

Legal: The information provided here reflects only a personal opinion of the author and does not constitute any professional or legal advice. For final decisions consult the appropriate standards. See also our general Disclaimer linked below.

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©2009 Lazar Rozenblat