The new standard IPC-2152, which is based on the latest studies provides more than 100 different figures and lets you take into account many additional factors, such as thickness of PCB and conductors, distance to a copper plane, etc. Our calculator will do all this for you, but below I'll still provide some basic explanations for those who would like to know the details.
We used IPC-2152 Figure 5-2 of IPC-2152, which represents a typical application. It contains i vs. Ac charts for the polyimide boards 0.070" thick with 3 ounce copper in still air. They are given for certain discrete values of temperature rise and they all are linear in logarithmic scales. We know that a straight line on log-log graph represents a polynomial. This means that: Ac(i)=K1×iK2, where K1 and K2 are some constants. For a selected ∆T one can derive K1 and K2 by estimating the slope and intercept point of an appropriate plot in Fig.5-2. Note that both the multiplier K1 and the exponent K2 vary depending on ∆T. I thought it would be convenient to have a unified formula for cross-sectional area as a function of electric current, so we could quickly find it for any arbitrary ∆T. For this I have interpolated K1(∆T) and K2(∆T) between 2 and 100 oC by using a curve fit function that employs least-squares power curve regression. The result is as follows: Acsq.mil=(117.555×∆T -0.913+1.15)×i(0.84×T -0.108+1.159)
Once you determined Ac, you can find the required trace width for a given copper weight: width=Ac/thickness, where minimum thickness(mil)=oz/1.3. The above equation provides reasonably accurate approximation of the generic Fig.5-2 charts. For example, for i=10A and ∆T=20oC the IPC gives Ac=500 while our formula yields 513.1, which is within 3% accuracy. Calculations based on these data should fit most applications and will be referred to as universal or generic. If you have a multi-layer PCB with a copper plane near your conductor, the actual ∆T will be substantially lower. However, for the boards less than 70 mils thick without a plane the temperatures may be higher. Therefore IPC referring to Fig.5-2 as conservative may be misleading. Anyway, to reflect the conditions of a specific application, one can introduce a correction (modifying) factor as the ratio between estimated actual and generic ∆T. Our widget approximates these factors for various cases based on the data in IPC appendix and shows them just for reference, so you can see how much each of them affected the result. If their product is less than 1, you can still use the "universal" numbers for design margin. However, if you don't have enough board space and want to reduce the size of the PCB tracks, you may choose to use more application-specific modified results. Let me explain how our calculator does it with the following example. Suppose you want ∆T=20oC and the net correction is 0.5. It means that if you use the "universal" Ac, your actual temperature rise will be 20×0.5=10oC. So, we want to revise Ac to get your desired 20oC. Since the Ac varies non-linearly with respect to ∆T, we can't just reduce it proportionally. Instead, our script first calculates "virtual temperature", which is your input ∆T divided by the product of all correction factors. This is like a reverse modification of the chart value. In our example it will be 20/0.5=40oC. Then the script plugs this number into our generic formula. In our tool this result is referred to as "revised".
For comparison, we also provided the numbers based on legacy IPC2221. You can see that the old standard overstated current carrying capacity of external tracks. Therefore it seems that for small boards without planes the designs that relied on the historical charts might have resulted in underrated external traces. That document also arbitrarily assumed that internal conductors could carry only half of the current of the outer ones. In reality, as mentioned in the new standard, inner layers may actually run cooler because the dielectric has 10 times better thermal conductivity than air. Therefore, because of the wrongful assumption, the legacy recommendations for internal tracks happened to be conservative. Note that the new rule suggests the same copper size for all board's layers. By the way, it may seem counterintuitive, but thicker conductors have lower current carrying capacity than thinner ones because of the smaller trace width at a given Ac.
For those who work with metric units, here is a quick conversion reference: 1 mm=0.03937", 1 mil^2=0.000645 mm^2, 1 oz/ft^2 copper is 0.033 mm thick minimum.
All the results here are obtained by interpolation of the IPC plots, so there is always some inaccuracy.
For simplicity, our calculations don't include the effect of the board material (FR4 is worse than polyimide just by 2%).
The analysis is valid for traces spaced apart by more than 1" (which often may not be practical). If parallel tracks are spaced closer, their temperatures will increase. In this case, you need to use combined current to determine their combined cross-sectional area. The presence of heat dissipating components may also raise the temperature.
The tests that formed the basis of the new standard were conducted for electric currents up to 30 ampere and ∆T up to 100 degree C.
The output data here do not include any derating. It is always recommended to add some safety margin.
The information and the widget are provided here with no liability of any kind whatsoever. They reflect only personal opinion of the author and do not constitute a professional or a legal advice. For final decisions consult the appropriate standards and your boss. Also see our general Disclaimer linked below.